Fault Analysis is used to detect critical failures in integrated circuits, which can arise from various sources, such as high-energy cosmic rays or manufacturing defects. A key technique in fault analysis is Photoemission Microscopy, which captures the infrared light emitted by transistors during operation. To reliably detect this weak signal, precise thinning of the silicon layer with good surface quality is necessary to access the active regions of the circuit. In backside failure analysis, most of the silicon die must be carefully removed to expose the circuitry and locate the failure.

A significant challenge in fault analysis is stopping the thinning process at the precise desired ablation depth, as the material structure remains unchanged, preventing the easy implementation of online diagnostics.

This work applies Machine Learning to predict ablation depth, surface roughness, and surface texture on silicon. A gradient boosting regressor is used to predict both ablation depth and surface roughness from laser parameters. Additionally, surface morphology is modeled using a generative adversarial network, with the predicted surface pattern scaled by the regressor output to ensure quantitative predictions.

This hybrid approach enables low-cost, quantitative predictions of ablation depth, surface quality, and surface texture on silicon, improving fault detection accuracy in integrated circuits.